ShiboSoftwareDev/am625sip-linux-board

subcircuits/microsd.tsx

import { XKTF_N02_N } from "../imports/XKTF_N02_N"

export const MICROSD_SOC_BOUNDARY_Y = {
  CMD: 4.571305,
  DAT0: 4.250025,
  CLK: 3.928745,
} as const

const BoundaryPad = ({
  name,
  pcbX = -10.5,
  pcbY,
  plated = false,
  compactPlated = false,
  compactSmt = false,
}: {
  name: string
  pcbX?: number
  pcbY: number
  plated?: boolean
  compactPlated?: boolean
  compactSmt?: boolean
}) => (
  <chip
    name={name}
    pcbX={pcbX}
    pcbY={pcbY}
    noSchematicRepresentation
    footprint={
      <footprint>
        {plated ? (
          <platedhole
            portHints={["pin1"]}
            shape="circle"
            holeDiameter={compactPlated ? "0.1mm" : "0.3mm"}
            outerDiameter={compactPlated ? "0.24mm" : "0.8mm"}
          />
        ) : (
          <smtpad
            portHints={["pin1"]}
            shape="rect"
            width={compactSmt ? "0.24mm" : "0.8mm"}
            height={compactSmt ? "0.24mm" : "0.8mm"}
          />
        )}
      </footprint>
    }
  />
)

export const MicroSdBlock = () => (
  <>
    <autoroutingphase
      name="MICROSD_BLOCK_SOC_INGRESS"
      phaseIndex={-1}
      autorouter="default"
    />
    <autoroutingphase
      name="MICROSD_BLOCK_SIGNALS"
      phaseIndex={0}
      autorouter="default"
    />
    <autoroutingphase
      name="MICROSD_BLOCK_POWER"
      phaseIndex={1}
      autorouter="default"
    />
    <autoroutingphase
      name="MICROSD_BLOCK_GROUND"
      phaseIndex={2}
      autorouter="default"
    />

    <XKTF_N02_N name="J1" pcbX={2} pcbY={0} pcbRotation={90} />
    <resistor
      name="R5"
      resistance="10k"
      footprint="0201"
      supplierPartNumbers={{ jlcpcb: ["C473048"] }}
      pcbX={-2.2}
      pcbY={10.2}
    />
    <resistor
      name="R6"
      resistance="10k"
      footprint="0201"
      supplierPartNumbers={{ jlcpcb: ["C473048"] }}
      pcbX={-4.2}
      pcbY={10.2}
    />
    <capacitor
      name="C22"
      capacitance="100nF"
      maxVoltageRating="10V"
      footprint="0201"
      supplierPartNumbers={{ jlcpcb: ["C1525"] }}
      pcbX={1.8}
      pcbY={10.2}
    />
    <capacitor
      name="C23"
      capacitance="1uF"
      maxVoltageRating="10V"
      footprint="0402"
      supplierPartNumbers={{ jlcpcb: ["C52923"] }}
      pcbX={4.3}
      pcbY={10.2}
    />

    <BoundaryPad
      name="X_CMD"
      pcbX={-9.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.CMD}
      compactSmt
    />
    <BoundaryPad
      name="X_DAT0"
      pcbX={-9.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.DAT0}
      compactSmt
    />
    <BoundaryPad
      name="X_CLK"
      pcbX={-9.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.CLK}
      compactSmt
    />
    <BoundaryPad
      name="X_SOC_CMD"
      pcbX={-10.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.CMD}
      plated
      compactPlated
    />
    <BoundaryPad
      name="X_SOC_DAT0"
      pcbX={-10.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.DAT0}
      plated
      compactPlated
    />
    <BoundaryPad
      name="X_SOC_CLK"
      pcbX={-10.2}
      pcbY={MICROSD_SOC_BOUNDARY_Y.CLK}
      plated
      compactPlated
    />
    <BoundaryPad name="X_VDD" pcbY={11.5} />
    <BoundaryPad name="X_GND" pcbX={-14} pcbY={-14} plated />

    <trace
      name="MICROSD_SOC_CMD_ENTRY"
      from=".X_SOC_CMD > .pin1"
      to=".X_CMD > .pin1"
      routingPhaseIndex={-1}
    />
    <trace
      name="MICROSD_SOC_DAT0_ENTRY"
      from=".X_SOC_DAT0 > .pin1"
      to=".X_DAT0 > .pin1"
      routingPhaseIndex={-1}
    />
    <trace
      name="MICROSD_SOC_CLK_ENTRY"
      from=".X_SOC_CLK > .pin1"
      to=".X_CLK > .pin1"
      routingPhaseIndex={-1}
    />

    <trace
      name="MICROSD_CMD"
      path={[".X_CMD > .pin1", ".J1 > .CMD", ".R5 > .pin1"]}
      maxLength="30mm"
      routingPhaseIndex={0}
    />
    <trace
      name="MICROSD_DAT0"
      path={[".X_DAT0 > .pin1", ".J1 > .DAT0", ".R6 > .pin1"]}
      maxLength="30mm"
      routingPhaseIndex={0}
    />
    <trace
      name="MICROSD_CLK_ENTRY"
      from=".X_CLK > .pin1"
      to=".J1 > .CLK"
      maxLength="30mm"
      routingPhaseIndex={0}
    />

    <trace
      name="MICROSD_VDD"
      path={[
        ".X_VDD > .pin1",
        ".R5 > .pin2",
        ".R6 > .pin2",
        ".J1 > .VDD",
        ".C22 > .pin1",
        ".C23 > .pin1",
      ]}
      width="0.2mm"
      maxLength="40mm"
      routingPhaseIndex={1}
    />
    <trace
      name="MICROSD_GND"
      path={[
        ".X_GND > .pin1",
        ".C22 > .pin2",
        ".C23 > .pin2",
        ".J1 > .VSS",
        ".J1 > .GND1",
        ".J1 > .GND2",
        ".J1 > .GND3",
        ".J1 > .GND4",
      ]}
      width="0.3mm"
      maxLength="40mm"
      routingPhaseIndex={2}
    />
  </>
)