tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit138/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_resistor",
"name": "resistor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C17513",
"C2907295",
"C25623"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_resistor",
"name": "resistor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C17513",
"C2907295",
"C25623"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_capacitor",
"name": "capacitor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_capacitor",
"name": "capacitor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C49678",
"C28233",
"C1711"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_capacitor",
"name": "capacitor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_capacitor",
"name": "capacitor-4",
"supplier_part_numbers": {
"jlcpcb": [
"C14663",
"C1591",
"C282519"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_6",
"ftype": "simple_capacitor",
"name": "capacitor-5",
"supplier_part_numbers": {
"jlcpcb": [
"C14663",
"C1591",
"C282519"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_component",
"source_component_id": "source_component_7",
"ftype": "simple_capacitor",
"name": "capacitor-6",
"supplier_part_numbers": {
"jlcpcb": [
"C49678",
"C28233",
"C1711"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_component",
"source_component_id": "source_component_8",
"name": "inductor-1",
"ftype": "simple_inductor",
"inductance": "10uH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_component",
"source_component_id": "source_component_9",
"ftype": "simple_transistor",
"name": "transistor-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "mosfet",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_10",
"ftype": "simple_transistor",
"name": "transistor-2",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "pnp",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_component",
"source_component_id": "source_component_11",
"ftype": "simple_transistor",
"name": "transistor-3",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "mosfet",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_12",
"ftype": "simple_transistor",
"name": "transistor-4",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "npn",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"5"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"6"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_component",
"source_component_id": "source_component_13",
"ftype": "simple_chip",
"name": "chip-1",
"manufacturer_part_number": "GENERIC",
"supplier_part_numbers": {
"jlcpcb": []
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_36",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_37",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_port",
"source_port_id": "source_port_38",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_port",
"source_port_id": "source_port_39",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
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{
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{
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{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-1 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_0",
"refdes": "resistor-1",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-2 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_1",
"refdes": "resistor-2",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-1 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_2",
"refdes": "capacitor-1",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-2 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_3",
"refdes": "capacitor-2",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-3 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_4",
"refdes": "capacitor-3",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-4 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_5",
"refdes": "capacitor-4",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-5 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_6",
"refdes": "capacitor-5",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_6"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-6 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_7",
"refdes": "capacitor-6",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_7"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component inductor-1 has ftype=\"simple_inductor\" but reference designator should start with one of L, FB",
"source_component_id": "source_component_8",
"refdes": "inductor-1",
"source_component_ftype": "simple_inductor",
"expected_prefixes": [
"L",
"FB"
],
"actual_prefix": "INDUCTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_8"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-1 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_9",
"refdes": "transistor-1",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_9"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-2 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_10",
"refdes": "transistor-2",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_10"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-3 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_11",
"refdes": "transistor-3",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_11"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-4 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_12",
"refdes": "transistor-4",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_12"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_13",
"refdes": "chip-1",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_13"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_14",
"refdes": "chip-2",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_14"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_0"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin1 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#8183(from:.resistor-1 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_1"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin2 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#8184(from:.resistor-1 > .pin2 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin2 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#8185(from:.resistor-2 > .pin2 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin1 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#8186(from:.resistor-2 > .pin1 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_5"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin2 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#8187(from:.capacitor-1 > .pin2 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_4"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin1 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#8188(from:.capacitor-1 > .pin1 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_6"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin1 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#8189(from:.capacitor-2 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_7"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin2 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#8190(from:.capacitor-2 > .pin2 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin1 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#8191(from:.capacitor-3 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin2 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#8192(from:.capacitor-3 > .pin2 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_11"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#8193(from:.capacitor-4 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_10"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin1 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#8194(from:.capacitor-4 > .pin1 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_12",
"connected_source_port_ids": [
"source_port_13"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-5 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
"message": "<trace#8195(from:.capacitor-5 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_12",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_13",
"connected_source_port_ids": [
"source_port_12"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-5 > .pin1 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
"message": "<trace#8196(from:.capacitor-5 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_13",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_14",
"connected_source_port_ids": [
"source_port_15"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-6 > .pin2 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
"message": "<trace#8197(from:.capacitor-6 > .pin2 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_14",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_15",
"connected_source_port_ids": [
"source_port_14"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-6 > .pin1 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
"message": "<trace#8198(from:.capacitor-6 > .pin1 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_15",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_16",
"connected_source_port_ids": [
"source_port_16"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin1 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
"message": "<trace#8199(from:.inductor-1 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_16",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_17",
"connected_source_port_ids": [
"source_port_17"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin2 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
"message": "<trace#8200(from:.inductor-1 > .pin2 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_17",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_18",
"connected_source_port_ids": [
"source_port_20"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin2 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
"message": "<trace#8201(from:.transistor-1 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_18",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_19",
"connected_source_port_ids": [
"source_port_18"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin1 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
"message": "<trace#8202(from:.transistor-1 > .pin1 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_19",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_20",
"connected_source_port_ids": [
"source_port_19"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin3 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
"message": "<trace#8203(from:.transistor-1 > .pin3 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_20",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_21",
"connected_source_port_ids": [
"source_port_22"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin3 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_21",
"message": "<trace#8204(from:.transistor-2 > .pin3 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_21",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_22",
"connected_source_port_ids": [
"source_port_23"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin2 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_22",
"message": "<trace#8205(from:.transistor-2 > .pin2 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_22",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_23",
"connected_source_port_ids": [
"source_port_21"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin1 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_23",
"message": "<trace#8206(from:.transistor-2 > .pin1 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_23",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_24",
"connected_source_port_ids": [
"source_port_25"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-3 > .pin3 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_24",
"message": "<trace#8207(from:.transistor-3 > .pin3 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_24",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_25",
"connected_source_port_ids": [
"source_port_26"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-3 > .pin2 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_25",
"message": "<trace#8208(from:.transistor-3 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_25",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_26",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-3 > .pin1 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_26",
"message": "<trace#8209(from:.transistor-3 > .pin1 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_26",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_27",
"connected_source_port_ids": [
"source_port_28"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-4 > .pin3 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_27",
"message": "<trace#8210(from:.transistor-4 > .pin3 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_27",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_28",
"connected_source_port_ids": [
"source_port_29"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-4 > .pin2 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_28",
"message": "<trace#8211(from:.transistor-4 > .pin2 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_28",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_29",
"connected_source_port_ids": [
"source_port_27"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-4 > .pin1 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_29",
"message": "<trace#8212(from:.transistor-4 > .pin1 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_29",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_30",
"connected_source_port_ids": [
"source_port_33"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin4 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_30",
"message": "<trace#8213(from:.chip-1 > .pin4 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_30",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_31",
"connected_source_port_ids": [
"source_port_35"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin6 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_31",
"message": "<trace#8214(from:.chip-1 > .pin6 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_31",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_32",
"connected_source_port_ids": [
"source_port_30"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin1 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_32",
"message": "<trace#8215(from:.chip-1 > .pin1 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_32",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_33",
"connected_source_port_ids": [
"source_port_32"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin3 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_33",
"message": "<trace#8216(from:.chip-1 > .pin3 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_33",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_34",
"connected_source_port_ids": [
"source_port_31"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin2 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_34",
"message": "<trace#8217(from:.chip-1 > .pin2 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_34",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_35",
"connected_source_port_ids": [
"source_port_34"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin5 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_35",
"message": "<trace#8218(from:.chip-1 > .pin5 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_35",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_36",
"connected_source_port_ids": [
"source_port_39"
],
"connected_source_net_ids": [
"source_net_17"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin4 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_36",
"message": "<trace#8219(from:.chip-2 > .pin4 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_36",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_37",
"connected_source_port_ids": [
"source_port_43"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin8 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_37",
"message": "<trace#8220(from:.chip-2 > .pin8 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_37",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_38",
"connected_source_port_ids": [
"source_port_36"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin1 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_38",
"message": "<trace#8221(from:.chip-2 > .pin1 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_38",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_39",
"connected_source_port_ids": [
"source_port_37"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin2 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_39",
"message": "<trace#8222(from:.chip-2 > .pin2 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_39",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_40",
"connected_source_port_ids": [
"source_port_41"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin6 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_40",
"message": "<trace#8223(from:.chip-2 > .pin6 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_40",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_41",
"connected_source_port_ids": [
"source_port_40"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin5 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_41",
"message": "<trace#8224(from:.chip-2 > .pin5 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_41",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_42",
"connected_source_port_ids": [
"source_port_38"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin3 to net.N16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_42",
"message": "<trace#8225(from:.chip-2 > .pin3 to:net.N16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_42",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_43",
"connected_source_port_ids": [
"source_port_42"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin7 to net.N16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_43",
"message": "<trace#8226(from:.chip-2 > .pin7 to:net.N16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_43",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_44",
"connected_source_port_ids": [
"source_port_45"
],
"connected_source_net_ids": [
"source_net_17"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin2 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_44",
"message": "<trace#8227(from:.pinhead-1 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_44",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_45",
"connected_source_port_ids": [
"source_port_44"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin1 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_45",
"message": "<trace#8228(from:.pinhead-1 > .pin1 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_45",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_46",
"connected_source_port_ids": [
"source_port_47"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin2 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_46",
"message": "<trace#8229(from:.pinhead-2 > .pin2 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_46",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_47",
"connected_source_port_ids": [
"source_port_50"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin5 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_47",
"message": "<trace#8230(from:.pinhead-2 > .pin5 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_47",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_48",
"connected_source_port_ids": [
"source_port_48"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin3 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_48",
"message": "<trace#8231(from:.pinhead-2 > .pin3 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_48",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_49",
"connected_source_port_ids": [
"source_port_46"
],
"connected_source_net_ids": [
"source_net_19"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin1 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_49",
"message": "<trace#8232(from:.pinhead-2 > .pin1 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_49",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_50",
"connected_source_port_ids": [
"source_port_51"
],
"connected_source_net_ids": [
"source_net_20"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin6 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_50",
"message": "<trace#8233(from:.pinhead-2 > .pin6 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_50",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_51",
"connected_source_port_ids": [
"source_port_49"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin4 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_51",
"message": "<trace#8234(from:.pinhead-2 > .pin4 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_51",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_52",
"connected_source_port_ids": [
"source_port_55"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin4 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_52",
"message": "<trace#8235(from:.pinhead-3 > .pin4 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_52",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_53",
"connected_source_port_ids": [
"source_port_57"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin6 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_53",
"message": "<trace#8236(from:.pinhead-3 > .pin6 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_53",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_54",
"connected_source_port_ids": [
"source_port_54"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin3 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_54",
"message": "<trace#8237(from:.pinhead-3 > .pin3 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_54",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_55",
"connected_source_port_ids": [
"source_port_56"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin5 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_55",
"message": "<trace#8238(from:.pinhead-3 > .pin5 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_55",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_56",
"connected_source_port_ids": [
"source_port_53"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin2 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_56",
"message": "<trace#8239(from:.pinhead-3 > .pin2 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_56",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_57",
"connected_source_port_ids": [
"source_port_52"
],
"connected_source_net_ids": [
"source_net_20"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-3 > .pin1 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_57",
"message": "<trace#8240(from:.pinhead-3 > .pin1 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_57",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_58",
"connected_source_port_ids": [
"source_port_59"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-4 > .pin2 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_58",
"message": "<trace#8241(from:.pinhead-4 > .pin2 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_58",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_59",
"connected_source_port_ids": [
"source_port_60"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-4 > .pin3 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_59",
"message": "<trace#8242(from:.pinhead-4 > .pin3 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_59",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_60",
"connected_source_port_ids": [
"source_port_58"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-4 > .pin1 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_60",
"message": "<trace#8243(from:.pinhead-4 > .pin1 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_60",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_61",
"connected_source_port_ids": [
"source_port_61"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-4 > .pin4 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_61",
"message": "<trace#8244(from:.pinhead-4 > .pin4 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_61",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_62",
"connected_source_port_ids": [
"source_port_62"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-5 > .pin1 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_62",
"message": "<trace#8245(from:.pinhead-5 > .pin1 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_62",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_63",
"connected_source_port_ids": [
"source_port_63"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-5 > .pin2 to net.N16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_63",
"message": "<trace#8246(from:.pinhead-5 > .pin2 to:net.N16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_63",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_64",
"connected_source_port_ids": [
"source_port_69"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin6 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_64",
"message": "<trace#8247(from:.pinhead-6 > .pin6 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_64",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_65",
"connected_source_port_ids": [
"source_port_65"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin2 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_65",
"message": "<trace#8248(from:.pinhead-6 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_65",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_66",
"connected_source_port_ids": [
"source_port_67"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin4 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_66",
"message": "<trace#8249(from:.pinhead-6 > .pin4 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_66",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_67",
"connected_source_port_ids": [
"source_port_68"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin5 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_67",
"message": "<trace#8250(from:.pinhead-6 > .pin5 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_67",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_68",
"connected_source_port_ids": [
"source_port_66"
],
"connected_source_net_ids": [
"source_net_19"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin3 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_68",
"message": "<trace#8251(from:.pinhead-6 > .pin3 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_68",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_69",
"connected_source_port_ids": [
"source_port_64"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-6 > .pin1 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_69",
"message": "<trace#8252(from:.pinhead-6 > .pin1 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_69",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 2.7794553499999983,
"y": -24.69749999999999
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_0",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_1",
"center": {
"x": 2.7794553499999983,
"y": -26.57749999999999
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_1",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_2",
"center": {
"x": 2.7794553499999983,
"y": -28.53749999999999
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_2",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_3",
"center": {
"x": 2.7794553499999988,
"y": -30.577499999999993
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_3",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_4",
"center": {
"x": 5.479183024999999,
"y": -22.554999999999993
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_4",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_5",
"center": {
"x": -2.0600000000000005,
"y": 2.3099999999999996
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_5",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
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"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0805"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_4",
"position": {
"x": 10,
"y": 15,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_4",
"source_component_id": "source_component_4",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_5",
"position": {
"x": 3,
"y": -16,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 15
},
"pcb_component_id": "pcb_component_5",
"source_component_id": "source_component_5",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0603"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_6",
"position": {
"x": 3,
"y": 8,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_6",
"source_component_id": "source_component_6",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0603"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_7",
"position": {
"x": 10,
"y": -4,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_7",
"source_component_id": "source_component_7",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0805"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_8",
"position": {
"x": -9,
"y": -19,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_8",
"source_component_id": "source_component_8",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_9",
"position": {
"x": -7,
"y": 15,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_9",
"source_component_id": "source_component_9",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-23"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_10",
"position": {
"x": -17.33587572106361,
"y": -1.3358757210636099,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 45
},
"pcb_component_id": "pcb_component_10",
"source_component_id": "source_component_10",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-23"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_11",
"position": {
"x": -0.8770609535763028,
"y": -20.705593336195882,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 345
},
"pcb_component_id": "pcb_component_11",
"source_component_id": "source_component_11",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-23"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_12",
"position": {
"x": 15,
"y": 9,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_12",
"source_component_id": "source_component_12",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-23"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_13",
"position": {
"x": 1,
"y": 9,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_13",
"source_component_id": "source_component_13",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_14",
"position": {
"x": 12,
"y": -20,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_14",
"source_component_id": "source_component_14",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_15",
"position": {
"x": -9,
"y": 11,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_15",
"source_component_id": "source_component_15",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow2"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_16",
"position": {
"x": -21,
"y": 15,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_16",
"source_component_id": "source_component_16",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_17",
"position": {
"x": 12,
"y": 20,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_17",
"source_component_id": "source_component_17",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_18",
"position": {
"x": -15,
"y": -17,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_18",
"source_component_id": "source_component_18",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow4"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_19",
"position": {
"x": -5,
"y": -7,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_19",
"source_component_id": "source_component_19",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow2"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_20",
"position": {
"x": -22,
"y": -12,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_20",
"source_component_id": "source_component_20",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "pcb_pad_pad_clearance_error",
"pcb_pad_pad_clearance_error_id": "pcb_pad_pad_clearance_error_0",
"error_type": "pcb_pad_pad_clearance_error",
"message": "Pads pcb_port[.capacitor-5 > .pin2] and pcb_plated_hole[#pcb_plated_hole_2] are too close (clearance: 0.025mm, minimum: 0.1mm)",
"pcb_pad_ids": [
"pcb_smtpad_13",
"pcb_plated_hole_2"
],
"minimum_clearance": 0.1,
"actual_clearance": 0.02499999999999991,
"center": {
"x": 1.5875,
"y": 7.865
}
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-1 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34",
"source_port_35"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_1",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-2 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_14",
"source_port_ids": [
"source_port_36",
"source_port_37",
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-1 has no pin with requires_power=true",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34",
"source_port_35"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_1",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-2 has no pin with requires_power=true",
"source_component_id": "source_component_14",
"source_port_ids": [
"source_port_36",
"source_port_37",
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-1 has no pin with requires_ground=true",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34",
"source_port_35"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_1",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-2 has no pin with requires_ground=true",
"source_component_id": "source_component_14",
"source_port_ids": [
"source_port_36",
"source_port_37",
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_S6siDYJEJ3",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#7723 name=\".capacitor-3\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_4",
"pcb_component_id": "pcb_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_LTJFJl6pfF",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#7893 name=\".pinhead-1\" /> footprint \"pinrow2\" does not match supplier footprint jlcpcb:C492401 (copper IoU 0.6674).",
"source_component_id": "source_component_15",
"pcb_component_id": "pcb_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492401",
"footprint_copper_intersection_over_union": 0.6674
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_CMmKSrQfbZ",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#7902 name=\".pinhead-2\" /> footprint \"pinrow6\" does not match supplier footprint jlcpcb:C492420 (copper IoU 0.255).",
"source_component_id": "source_component_16",
"pcb_component_id": "pcb_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492420",
"footprint_copper_intersection_over_union": 0.255
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_K7a4j79aam",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#7699 name=\".capacitor-1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_2",
"pcb_component_id": "pcb_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_Qj048ljA71",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#7968 name=\".pinhead-6\" /> footprint \"pinrow6\" does not match supplier footprint jlcpcb:C492420 (copper IoU 0.255).",
"source_component_id": "source_component_20",
"pcb_component_id": "pcb_component_20",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492420",
"footprint_copper_intersection_over_union": 0.255
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_yIDzUG4wrd",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#7959 name=\".pinhead-5\" /> footprint \"pinrow2\" does not match supplier footprint jlcpcb:C492401 (copper IoU 0.6674).",
"source_component_id": "source_component_19",
"pcb_component_id": "pcb_component_19",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492401",
"footprint_copper_intersection_over_union": 0.6674
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_408qI7ZLLj",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#7923 name=\".pinhead-3\" /> footprint \"pinrow6\" does not match supplier footprint jlcpcb:C492420 (copper IoU 0.255).",
"source_component_id": "source_component_17",
"pcb_component_id": "pcb_component_17",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492420",
"footprint_copper_intersection_over_union": 0.255
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_rKzBAZbGSD",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#7735 name=\".capacitor-4\" /> footprint \"0603\" does not match supplier footprint jlcpcb:C14663 (copper IoU 0.6007).",
"source_component_id": "source_component_5",
"pcb_component_id": "pcb_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C14663",
"footprint_copper_intersection_over_union": 0.6007
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
}
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