tscircuit/autorouting-dataset-01

This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
Version: 1.0.102
License: unset
Stars: 4
dist/lib/circuit/circuit180/circuit.json

PCB
Schematic
[
  {
    "type": "source_group",
    "source_group_id": "source_group_0",
    "is_subcircuit": true,
    "was_automatically_named": true,
    "subcircuit_id": "subcircuit_source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_0",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_1",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_0",
    "ftype": "simple_resistor",
    "name": "resistor-1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C17513",
        "C2907295",
        "C25623"
      ]
    },
    "resistance": 1000,
    "display_resistance": "1kΩ",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_2",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_3",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_1",
    "ftype": "simple_resistor",
    "name": "resistor-2",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C11702",
        "C25543",
        "C2906864"
      ]
    },
    "resistance": 1000,
    "display_resistance": "1kΩ",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_4",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_5",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_2",
    "ftype": "simple_resistor",
    "name": "resistor-3",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C17513",
        "C2907295",
        "C25623"
      ]
    },
    "resistance": 1000,
    "display_resistance": "1kΩ",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_6",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "pos",
      "anode",
      "1",
      "left"
    ],
    "source_component_id": "source_component_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_7",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "neg",
      "cathode",
      "2",
      "right"
    ],
    "source_component_id": "source_component_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_3",
    "ftype": "simple_capacitor",
    "name": "capacitor-1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C1525",
        "C307331",
        "C60474"
      ]
    },
    "capacitance": 1e-7,
    "display_capacitance": "0.1uF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_8",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "pos",
      "anode",
      "left",
      "1"
    ],
    "source_component_id": "source_component_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_9",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "neg",
      "cathode",
      "right",
      "2"
    ],
    "source_component_id": "source_component_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_4",
    "ftype": "simple_diode",
    "name": "diode-1",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": false,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_10",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "pos",
      "anode",
      "left",
      "1"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_11",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "neg",
      "cathode",
      "right",
      "2"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_5",
    "ftype": "simple_diode",
    "name": "diode-2",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": false,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_12",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "pos",
      "anode",
      "left",
      "1"
    ],
    "source_component_id": "source_component_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_13",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "neg",
      "cathode",
      "right",
      "2"
    ],
    "source_component_id": "source_component_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_6",
    "ftype": "simple_diode",
    "name": "diode-3",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": false,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_14",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "collector",
      "c",
      "1"
    ],
    "source_component_id": "source_component_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_15",
    "name": "pin3",
    "pin_number": 3,
    "port_hints": [
      "pin3",
      "emitter",
      "e",
      "3"
    ],
    "source_component_id": "source_component_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_16",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "base",
      "b",
      "2"
    ],
    "source_component_id": "source_component_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_7",
    "ftype": "simple_transistor",
    "name": "transistor-1",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "transistor_type": "jfet",
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_17",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "collector",
      "c",
      "1"
    ],
    "source_component_id": "source_component_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_18",
    "name": "pin3",
    "pin_number": 3,
    "port_hints": [
      "pin3",
      "emitter",
      "e",
      "3"
    ],
    "source_component_id": "source_component_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_19",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "base",
      "b",
      "2"
    ],
    "source_component_id": "source_component_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_8",
    "ftype": "simple_transistor",
    "name": "transistor-2",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "transistor_type": "bjt",
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_20",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "1"
    ],
    "source_component_id": "source_component_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_21",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "2"
    ],
    "source_component_id": "source_component_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_9",
    "ftype": "simple_pin_header",
    "name": "pinhead-1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C492401",
        "C124375",
        "C41370734"
      ]
    },
    "pin_count": 2,
    "gender": "male",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_0",
    "name": "N1",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_1",
    "name": "N4",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_2",
    "name": "N3",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_3",
    "name": "N6",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_4",
    "name": "N7",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_5",
    "name": "N5",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_6",
    "name": "N2",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_board",
    "source_board_id": "source_board_0",
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component resistor-1 has ftype=\"simple_resistor\" but reference designator should start with R",
    "source_component_id": "source_component_0",
    "refdes": "resistor-1",
    "source_component_ftype": "simple_resistor",
    "expected_prefixes": [
      "R"
    ],
    "actual_prefix": "RESISTOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component resistor-2 has ftype=\"simple_resistor\" but reference designator should start with R",
    "source_component_id": "source_component_1",
    "refdes": "resistor-2",
    "source_component_ftype": "simple_resistor",
    "expected_prefixes": [
      "R"
    ],
    "actual_prefix": "RESISTOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component resistor-3 has ftype=\"simple_resistor\" but reference designator should start with R",
    "source_component_id": "source_component_2",
    "refdes": "resistor-3",
    "source_component_ftype": "simple_resistor",
    "expected_prefixes": [
      "R"
    ],
    "actual_prefix": "RESISTOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component capacitor-1 has ftype=\"simple_capacitor\" but reference designator should start with C",
    "source_component_id": "source_component_3",
    "refdes": "capacitor-1",
    "source_component_ftype": "simple_capacitor",
    "expected_prefixes": [
      "C"
    ],
    "actual_prefix": "CAPACITOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component diode-1 has ftype=\"simple_diode\" but reference designator should start with D",
    "source_component_id": "source_component_4",
    "refdes": "diode-1",
    "source_component_ftype": "simple_diode",
    "expected_prefixes": [
      "D"
    ],
    "actual_prefix": "DIODE",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component diode-2 has ftype=\"simple_diode\" but reference designator should start with D",
    "source_component_id": "source_component_5",
    "refdes": "diode-2",
    "source_component_ftype": "simple_diode",
    "expected_prefixes": [
      "D"
    ],
    "actual_prefix": "DIODE",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component diode-3 has ftype=\"simple_diode\" but reference designator should start with D",
    "source_component_id": "source_component_6",
    "refdes": "diode-3",
    "source_component_ftype": "simple_diode",
    "expected_prefixes": [
      "D"
    ],
    "actual_prefix": "DIODE",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_6"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component transistor-1 has ftype=\"simple_transistor\" but reference designator should start with Q",
    "source_component_id": "source_component_7",
    "refdes": "transistor-1",
    "source_component_ftype": "simple_transistor",
    "expected_prefixes": [
      "Q"
    ],
    "actual_prefix": "TRANSISTOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_7"
  },
  {
    "type": "source_refdes_convention_warning",
    "warning_type": "source_refdes_convention_warning",
    "message": "Component transistor-2 has ftype=\"simple_transistor\" but reference designator should start with Q",
    "source_component_id": "source_component_8",
    "refdes": "transistor-2",
    "source_component_ftype": "simple_transistor",
    "expected_prefixes": [
      "Q"
    ],
    "actual_prefix": "TRANSISTOR",
    "source_refdes_convention_warning_id": "source_refdes_convention_warning_8"
  },
  {
    "type": "source_invalid_component_property_error",
    "source_invalid_component_property_error_id": "source_invalid_component_property_error_0",
    "source_component_id": "source_component_7",
    "property_name": "footprint",
    "message": "Invalid footprint prop on transistor \"transistor-1\": \"SOT-223\". Parser details: [\n  {\n    \"received\": -223,\n    \"code\": \"invalid_literal\",\n    \"expected\": 6,\n    \"path\": [\n      \"num_pins\"\n    ],\n    \"message\": \"Invalid literal value, expected 6\"\n  }\n]",
    "error_type": "source_invalid_component_property_error"
  },
  {
    "type": "source_invalid_component_property_error",
    "source_invalid_component_property_error_id": "source_invalid_component_property_error_1",
    "source_component_id": "source_component_8",
    "property_name": "footprint",
    "message": "Invalid footprint prop on transistor \"transistor-2\": \"SOT-223\". Parser details: [\n  {\n    \"received\": -223,\n    \"code\": \"invalid_literal\",\n    \"expected\": 6,\n    \"path\": [\n      \"num_pins\"\n    ],\n    \"message\": \"Invalid literal value, expected 6\"\n  }\n]",
    "error_type": "source_invalid_component_property_error"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_0",
    "connected_source_port_ids": [
      "source_port_0"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-1 > .pin1 to net.N1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
    "message": "<trace#14766(from:.resistor-1 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_1",
    "connected_source_port_ids": [
      "source_port_1"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-1 > .pin2 to net.N4",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
    "message": "<trace#14767(from:.resistor-1 > .pin2 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_2",
    "connected_source_port_ids": [
      "source_port_2"
    ],
    "connected_source_net_ids": [
      "source_net_2"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-2 > .pin1 to net.N3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
    "message": "<trace#14768(from:.resistor-2 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_3",
    "connected_source_port_ids": [
      "source_port_3"
    ],
    "connected_source_net_ids": [
      "source_net_2"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-2 > .pin2 to net.N3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
    "message": "<trace#14769(from:.resistor-2 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_4",
    "connected_source_port_ids": [
      "source_port_4"
    ],
    "connected_source_net_ids": [
      "source_net_3"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-3 > .pin1 to net.N6",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
    "message": "<trace#14770(from:.resistor-3 > .pin1 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_5",
    "connected_source_port_ids": [
      "source_port_5"
    ],
    "connected_source_net_ids": [
      "source_net_4"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".resistor-3 > .pin2 to net.N7",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
    "message": "<trace#14771(from:.resistor-3 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_6",
    "connected_source_port_ids": [
      "source_port_6"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".capacitor-1 > .pin1 to net.N4",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
    "message": "<trace#14772(from:.capacitor-1 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_7",
    "connected_source_port_ids": [
      "source_port_7"
    ],
    "connected_source_net_ids": [
      "source_net_5"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".capacitor-1 > .pin2 to net.N5",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
    "message": "<trace#14773(from:.capacitor-1 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_8",
    "connected_source_port_ids": [
      "source_port_8"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-1 > .pin1 to net.N1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
    "message": "<trace#14774(from:.diode-1 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_9",
    "connected_source_port_ids": [
      "source_port_9"
    ],
    "connected_source_net_ids": [
      "source_net_5"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-1 > .pin2 to net.N5",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
    "message": "<trace#14775(from:.diode-1 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_10",
    "connected_source_port_ids": [
      "source_port_11"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-2 > .pin2 to net.N1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
    "message": "<trace#14776(from:.diode-2 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_10",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_11",
    "connected_source_port_ids": [
      "source_port_10"
    ],
    "connected_source_net_ids": [
      "source_net_3"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-2 > .pin1 to net.N6",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
    "message": "<trace#14777(from:.diode-2 > .pin1 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_11",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_12",
    "connected_source_port_ids": [
      "source_port_12"
    ],
    "connected_source_net_ids": [
      "source_net_4"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-3 > .pin1 to net.N7",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
    "message": "<trace#14778(from:.diode-3 > .pin1 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_12",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_13",
    "connected_source_port_ids": [
      "source_port_13"
    ],
    "connected_source_net_ids": [
      "source_net_4"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".diode-3 > .pin2 to net.N7",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
    "message": "<trace#14779(from:.diode-3 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_13",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_14",
    "connected_source_port_ids": [
      "source_port_15"
    ],
    "connected_source_net_ids": [
      "source_net_6"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-1 > .pin3 to net.N2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
    "message": "<trace#14780(from:.transistor-1 > .pin3 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_14",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_15",
    "connected_source_port_ids": [
      "source_port_14"
    ],
    "connected_source_net_ids": [
      "source_net_6"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-1 > .pin1 to net.N2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
    "message": "<trace#14781(from:.transistor-1 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_15",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_16",
    "connected_source_port_ids": [
      "source_port_16"
    ],
    "connected_source_net_ids": [
      "source_net_6"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-1 > .pin2 to net.N2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
    "message": "<trace#14782(from:.transistor-1 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_16",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_17",
    "connected_source_port_ids": [
      "source_port_17"
    ],
    "connected_source_net_ids": [
      "source_net_6"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-2 > .pin1 to net.N2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
    "message": "<trace#14783(from:.transistor-2 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_17",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_18",
    "connected_source_port_ids": [
      "source_port_19"
    ],
    "connected_source_net_ids": [
      "source_net_5"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-2 > .pin2 to net.N5",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
    "message": "<trace#14784(from:.transistor-2 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_18",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_19",
    "connected_source_port_ids": [
      "source_port_18"
    ],
    "connected_source_net_ids": [
      "source_net_5"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".transistor-2 > .pin3 to net.N5",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
    "message": "<trace#14785(from:.transistor-2 > .pin3 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_19",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_20",
    "connected_source_port_ids": [
      "source_port_20"
    ],
    "connected_source_net_ids": [
      "source_net_2"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".pinhead-1 > .pin1 to net.N3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
    "message": "<trace#14786(from:.pinhead-1 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_20",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_21",
    "connected_source_port_ids": [
      "source_port_21"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": ".pinhead-1 > .pin2 to net.N4",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_21",
    "message": "<trace#14787(from:.pinhead-1 > .pin2 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_21",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": 0,
      "y": -3.9850000000000003
    },
    "size": {
      "width": 0.6,
      "height": 0.65
    },
    "source_component_id": "source_component_0",
    "is_box_with_pins": true,
    "symbol_name": "boxresistor_right",
    "symbol_display_value": "1kΩ",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_1",
    "center": {
      "x": 0,
      "y": -5.865
    },
    "size": {
      "width": 0.6,
      "height": 0.65
    },
    "source_component_id": "source_component_1",
    "is_box_with_pins": true,
    "symbol_name": "boxresistor_right",
    "symbol_display_value": "1kΩ",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_2",
    "center": {
      "x": 0,
      "y": -7.745
    },
    "size": {
      "width": 0.6,
      "height": 0.65
    },
    "source_component_id": "source_component_2",
    "is_box_with_pins": true,
    "symbol_name": "boxresistor_right",
    "symbol_display_value": "1kΩ",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_3",
    "center": {
      "x": 0,
      "y": -9.705
    },
    "size": {
      "width": 0.6,
      "height": 0.65
    },
    "source_component_id": "source_component_3",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_right",
    "symbol_display_value": "0.1uF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_4",
    "center": {
      "x": 0,
      "y": -11.665
    },
    "size": {
      "width": 1.04,
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    "footprinter_string": "sod123"
  },
  {
    "type": "cad_component",
    "cad_component_id": "cad_component_7",
    "position": {
      "x": -6.5,
      "y": 1,
      "z": 0.7
    },
    "rotation": {
      "x": 0,
      "y": 0,
      "z": 0
    },
    "pcb_component_id": "pcb_component_7",
    "source_component_id": "source_component_7",
    "model_origin_alignment": "center_of_component_on_board_surface",
    "anchor_alignment": "center_of_component_on_board_surface",
    "footprinter_string": "SOT-223"
  },
  {
    "type": "cad_component",
    "cad_component_id": "cad_component_8",
    "position": {
      "x": 5.5,
      "y": 3,
      "z": 0.7
    },
    "rotation": {
      "x": 0,
      "y": 0,
      "z": 0
    },
    "pcb_component_id": "pcb_component_8",
    "source_component_id": "source_component_8",
    "model_origin_alignment": "center_of_component_on_board_surface",
    "anchor_alignment": "center_of_component_on_board_surface",
    "footprinter_string": "SOT-223"
  },
  {
    "type": "cad_component",
    "cad_component_id": "cad_component_9",
    "position": {
      "x": 5.5,
      "y": -7,
      "z": 0.7
    },
    "rotation": {
      "x": 0,
      "y": 0,
      "z": 0
    },
    "pcb_component_id": "pcb_component_9",
    "source_component_id": "source_component_9",
    "model_origin_alignment": "center_of_component_on_board_surface",
    "anchor_alignment": "center_of_component_on_board_surface",
    "footprinter_string": "pinrow2"
  },
  {
    "type": "supplier_footprint_mismatch_warning",
    "supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_pS6pyMag2m",
    "warning_type": "supplier_footprint_mismatch_warning",
    "message": "<resistor#14618 name=\".resistor-2\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C11702 (copper IoU 0.5606).",
    "source_component_id": "source_component_1",
    "pcb_component_id": "pcb_component_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "supplier_name": "jlcpcb",
    "supplier_part_number": "C11702",
    "footprint_copper_intersection_over_union": 0.5606
  },
  {
    "type": "supplier_footprint_mismatch_warning",
    "supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_AOxdW7cxvr",
    "warning_type": "supplier_footprint_mismatch_warning",
    "message": "<pinheader#14709 name=\".pinhead-1\" /> footprint \"pinrow2\" does not match supplier footprint jlcpcb:C492401 (copper IoU 0.6674).",
    "source_component_id": "source_component_9",
    "pcb_component_id": "pcb_component_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "supplier_name": "jlcpcb",
    "supplier_part_number": "C492401",
    "footprint_copper_intersection_over_union": 0.6674
  },
  {
    "type": "supplier_footprint_mismatch_warning",
    "supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_NauvkMJZkq",
    "warning_type": "supplier_footprint_mismatch_warning",
    "message": "<capacitor#14644 name=\".capacitor-1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
    "source_component_id": "source_component_3",
    "pcb_component_id": "pcb_component_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "supplier_name": "jlcpcb",
    "supplier_part_number": "C1525",
    "footprint_copper_intersection_over_union": 0.7249
  },
  {
    "type": "supplier_footprint_mismatch_warning",
    "supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_uK96tZXv1O",
    "warning_type": "supplier_footprint_mismatch_warning",
    "message": "<resistor#14605 name=\".resistor-1\" /> footprint \"0805\" does not match supplier footprint jlcpcb:C17513 (copper IoU 0.6741).",
    "source_component_id": "source_component_0",
    "pcb_component_id": "pcb_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "supplier_name": "jlcpcb",
    "supplier_part_number": "C17513",
    "footprint_copper_intersection_over_union": 0.6741
  },
  {
    "type": "source_project_metadata",
    "source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
  }
]
dist/lib/circuit/circuit180/circuit.json

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