tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
lib/dataset/circuit172.simple-route.json
{
"bounds": {
"minX": -8.5,
"maxX": 8.5,
"minY": -8.5,
"maxY": 8.5
},
"obstacles": [
{
"componentId": "pcb_component_0",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -3.5,
"y": -3.4125
},
"width": 1.4,
"height": 1.025,
"connectedTo": [
"pcb_smtpad_0",
"connectivity_net34",
"source_trace_14",
"source_port_16",
"source_trace_0",
"source_port_0",
"source_net_0",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_16",
"pcb_port_16"
]
},
{
"componentId": "pcb_component_0",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -3.5,
"y": -1.5875
},
"width": 1.4,
"height": 1.025,
"connectedTo": [
"pcb_smtpad_1",
"connectivity_net38",
"source_trace_16",
"source_port_14",
"source_trace_9",
"source_port_9",
"source_trace_1",
"source_port_1",
"source_net_1",
"pcb_smtpad_1",
"pcb_port_1",
"pcb_smtpad_9",
"pcb_port_9",
"pcb_smtpad_14",
"pcb_port_14"
]
},
{
"componentId": "pcb_component_1",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -4.5875,
"y": 2.5
},
"width": 1.025,
"height": 1.4,
"connectedTo": [
"pcb_smtpad_2",
"connectivity_net19",
"source_trace_7",
"source_port_7",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_net_3",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_7",
"pcb_port_7"
]
},
{
"componentId": "pcb_component_1",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -6.4125,
"y": 2.5
},
"width": 1.025,
"height": 1.4,
"connectedTo": [
"pcb_smtpad_3",
"connectivity_net30",
"source_trace_12",
"source_port_13",
"source_trace_4",
"source_port_4",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_13",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_2",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 0.99,
"y": 5.5
},
"width": 0.54,
"height": 0.64,
"connectedTo": [
"pcb_smtpad_4",
"connectivity_net30",
"source_trace_12",
"source_port_13",
"source_trace_4",
"source_port_4",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_13",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_2",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 2.01,
"y": 5.5
},
"width": 0.54,
"height": 0.64,
"connectedTo": [
"pcb_smtpad_5",
"connectivity_net19",
"source_trace_7",
"source_port_7",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_net_3",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_7",
"pcb_port_7"
]
},
{
"componentId": "pcb_component_3",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": 5.55,
"y": 2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_6",
"connectivity_net21",
"source_trace_8",
"source_port_8",
"source_trace_6",
"source_port_6",
"source_net_4",
"pcb_smtpad_6",
"pcb_port_6",
"pcb_smtpad_8",
"pcb_port_8"
]
},
{
"componentId": "pcb_component_3",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": 3.45,
"y": 2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_7",
"connectivity_net19",
"source_trace_7",
"source_port_7",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_net_3",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_7",
"pcb_port_7"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -5.55,
"y": 1.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_8",
"connectivity_net21",
"source_trace_8",
"source_port_8",
"source_trace_6",
"source_port_6",
"source_net_4",
"pcb_smtpad_6",
"pcb_port_6",
"pcb_smtpad_8",
"pcb_port_8"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -3.45,
"y": 1.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_9",
"connectivity_net38",
"source_trace_16",
"source_port_14",
"source_trace_9",
"source_port_9",
"source_trace_1",
"source_port_1",
"source_net_1",
"pcb_smtpad_1",
"pcb_port_1",
"pcb_smtpad_9",
"pcb_port_9",
"pcb_smtpad_14",
"pcb_port_14"
]
},
{
"componentId": "pcb_component_5",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -1.55,
"y": 2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_10",
"connectivity_net36",
"source_trace_15",
"source_port_15",
"source_trace_13",
"source_port_12",
"source_trace_11",
"source_port_11",
"source_trace_10",
"source_port_10",
"source_net_5",
"pcb_smtpad_10",
"pcb_port_10",
"pcb_smtpad_11",
"pcb_port_11",
"pcb_smtpad_12",
"pcb_port_12",
"pcb_smtpad_15",
"pcb_port_15"
]
},
{
"componentId": "pcb_component_5",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 0.55,
"y": 2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_11",
"connectivity_net36",
"source_trace_15",
"source_port_15",
"source_trace_13",
"source_port_12",
"source_trace_11",
"source_port_11",
"source_trace_10",
"source_port_10",
"source_net_5",
"pcb_smtpad_10",
"pcb_port_10",
"pcb_smtpad_11",
"pcb_port_11",
"pcb_smtpad_12",
"pcb_port_12",
"pcb_smtpad_15",
"pcb_port_15"
]
},
{
"componentId": "pcb_component_6",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": 1.55,
"y": -2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_12",
"connectivity_net36",
"source_trace_15",
"source_port_15",
"source_trace_13",
"source_port_12",
"source_trace_11",
"source_port_11",
"source_trace_10",
"source_port_10",
"source_net_5",
"pcb_smtpad_10",
"pcb_port_10",
"pcb_smtpad_11",
"pcb_port_11",
"pcb_smtpad_12",
"pcb_port_12",
"pcb_smtpad_15",
"pcb_port_15"
]
},
{
"componentId": "pcb_component_6",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -0.55,
"y": -2.5
},
"width": 0.6,
"height": 0.45,
"connectedTo": [
"pcb_smtpad_13",
"connectivity_net30",
"source_trace_12",
"source_port_13",
"source_trace_4",
"source_port_4",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_13",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -6.45,
"y": -2.2
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_14",
"connectivity_net38",
"source_trace_16",
"source_port_14",
"source_trace_9",
"source_port_9",
"source_trace_1",
"source_port_1",
"source_net_1",
"pcb_smtpad_1",
"pcb_port_1",
"pcb_smtpad_9",
"pcb_port_9",
"pcb_smtpad_14",
"pcb_port_14"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -5.5,
"y": -2.2
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_15",
"connectivity_net36",
"source_trace_15",
"source_port_15",
"source_trace_13",
"source_port_12",
"source_trace_11",
"source_port_11",
"source_trace_10",
"source_port_10",
"source_net_5",
"pcb_smtpad_10",
"pcb_port_10",
"pcb_smtpad_11",
"pcb_port_11",
"pcb_smtpad_12",
"pcb_port_12",
"pcb_smtpad_15",
"pcb_port_15"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -4.55,
"y": -2.2
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_16",
"connectivity_net34",
"source_trace_14",
"source_port_16",
"source_trace_0",
"source_port_0",
"source_net_0",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_16",
"pcb_port_16"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -4.55,
"y": -4.8
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_17",
"connectivity_net80",
"source_port_17",
"pcb_smtpad_17",
"pcb_port_17"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -5.5,
"y": -4.8
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_18",
"connectivity_net81",
"source_port_18",
"pcb_smtpad_18",
"pcb_port_18"
]
},
{
"componentId": "pcb_component_7",
"type": "rect",
"layers": [
"bottom"
],
"center": {
"x": -6.45,
"y": -4.8
},
"width": 0.7,
"height": 1,
"connectedTo": [
"pcb_smtpad_19",
"connectivity_net82",
"source_port_19",
"pcb_smtpad_19",
"pcb_port_19"
]
}
],
"connections": [
{
"name": "source_net_0",
"pointsToConnect": [
{
"x": -3.5,
"y": -3.4125,
"layer": "top",
"pointId": "pcb_port_0",
"pcb_port_id": "pcb_port_0"
},
{
"x": -4.55,
"y": -2.2,
"layer": "bottom",
"pointId": "pcb_port_16",
"pcb_port_id": "pcb_port_16"
}
]
},
{
"name": "source_net_1",
"pointsToConnect": [
{
"x": -3.5,
"y": -1.5875,
"layer": "top",
"pointId": "pcb_port_1",
"pcb_port_id": "pcb_port_1"
},
{
"x": -3.45,
"y": 1.5,
"layer": "top",
"pointId": "pcb_port_9",
"pcb_port_id": "pcb_port_9"
},
{
"x": -6.45,
"y": -2.2,
"layer": "bottom",
"pointId": "pcb_port_14",
"pcb_port_id": "pcb_port_14"
}
]
},
{
"name": "source_net_2",
"pointsToConnect": [
{
"x": -6.4125,
"y": 2.5,
"layer": "bottom",
"pointId": "pcb_port_3",
"pcb_port_id": "pcb_port_3"
},
{
"x": 0.99,
"y": 5.5,
"layer": "top",
"pointId": "pcb_port_4",
"pcb_port_id": "pcb_port_4"
},
{
"x": -0.55,
"y": -2.5,
"layer": "bottom",
"pointId": "pcb_port_13",
"pcb_port_id": "pcb_port_13"
}
]
},
{
"name": "source_net_3",
"pointsToConnect": [
{
"x": -4.5875,
"y": 2.5,
"layer": "bottom",
"pointId": "pcb_port_2",
"pcb_port_id": "pcb_port_2"
},
{
"x": 2.01,
"y": 5.5,
"layer": "top",
"pointId": "pcb_port_5",
"pcb_port_id": "pcb_port_5"
},
{
"x": 3.45,
"y": 2.5,
"layer": "bottom",
"pointId": "pcb_port_7",
"pcb_port_id": "pcb_port_7"
}
]
},
{
"name": "source_net_4",
"pointsToConnect": [
{
"x": 5.55,
"y": 2.5,
"layer": "bottom",
"pointId": "pcb_port_6",
"pcb_port_id": "pcb_port_6"
},
{
"x": -5.55,
"y": 1.5,
"layer": "top",
"pointId": "pcb_port_8",
"pcb_port_id": "pcb_port_8"
}
]
},
{
"name": "source_net_5",
"pointsToConnect": [
{
"x": -1.55,
"y": 2.5,
"layer": "top",
"pointId": "pcb_port_10",
"pcb_port_id": "pcb_port_10"
},
{
"x": 0.55,
"y": 2.5,
"layer": "top",
"pointId": "pcb_port_11",
"pcb_port_id": "pcb_port_11"
},
{
"x": 1.55,
"y": -2.5,
"layer": "bottom",
"pointId": "pcb_port_12",
"pcb_port_id": "pcb_port_12"
},
{
"x": -5.5,
"y": -2.2,
"layer": "bottom",
"pointId": "pcb_port_15",
"pcb_port_id": "pcb_port_15"
}
]
}
],
"layerCount": 2,
"minTraceWidth": 0.15
}
Related Packages
More from this authortscircuit/dataset-srj12-bus-routingThe code defines electronic circuit diagrams featuring PCB layouts with USB-C, HDMI, and general-purpose chips, connecting their pins with traces, component footprints, and annotations for hardware design.
Similar package0hmX/esp32-s3-usb-webcam-ov2640This code defines and integrates a variety of surface-mount, through-hole, and connector hardware components (including microcontrollers, regulators, resistors, capacitors, and connectors) into a PCB design framework, enabling schematic symbol creation, footprint definition, and automated routing within an electronic circuit layout.
Discover something newastra-abse/t113-s3Allwinner T113-S3 fanout from JLCPCB C5197687: 128 verified escapes, LCD top, storage right; reusable T113S3Module with clean DRC and shorts checks.