tscircuit/dataset-srj12-bus-routing
The code defines electronic circuit diagrams featuring PCB layouts with USB-C, HDMI, and general-purpose chips, connecting their pins with traces, component footprints, and annotations for hardware design.
- Version
- 1.0.6
- License
- unset
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- 0
circuits/sample010/sample010.circuit.simple-route.json
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"source_port_6",
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"pcb_smtpad_3",
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"pcb_plated_hole_10",
"pcb_port_29"
]
},
{
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"pcb_port_30"
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{
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"pcb_port_31"
]
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{
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"pcb_port_32"
]
},
{
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},
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"source_trace_10",
"source_port_10",
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"pcb_smtpad_10",
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"pcb_port_33"
]
},
{
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"pcb_port_34"
]
},
{
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],
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},
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"source_trace_12",
"source_port_12",
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"pcb_smtpad_12",
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"pcb_plated_hole_16",
"pcb_port_35"
]
},
{
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},
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"source_trace_13",
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"pcb_port_36"
]
},
{
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],
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},
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"connectedTo": [
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"connectivity_net42",
"source_trace_14",
"source_port_14",
"source_port_37",
"pcb_smtpad_14",
"pcb_port_14",
"pcb_plated_hole_18",
"pcb_port_37"
]
},
{
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],
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},
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"connectedTo": [
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"source_trace_15",
"source_port_15",
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"pcb_smtpad_15",
"pcb_port_15",
"pcb_plated_hole_19",
"pcb_port_38"
]
},
{
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],
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},
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"connectedTo": [
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"connectivity_net48",
"source_trace_16",
"source_port_16",
"source_port_39",
"pcb_smtpad_16",
"pcb_port_16",
"pcb_plated_hole_20",
"pcb_port_39"
]
},
{
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],
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},
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"connectedTo": [
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"connectivity_net51",
"source_trace_17",
"source_port_17",
"source_port_40",
"pcb_smtpad_17",
"pcb_port_17",
"pcb_plated_hole_21",
"pcb_port_40"
]
},
{
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],
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},
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"connectedTo": [
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"connectivity_net54",
"source_trace_18",
"source_port_18",
"source_port_41",
"pcb_smtpad_18",
"pcb_port_18",
"pcb_plated_hole_22",
"pcb_port_41"
]
}
],
"connections": [
{
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{
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}
]
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{
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},
{
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}
]
},
{
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{
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}
]
},
{
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{
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{
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}
]
},
{
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{
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{
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}
]
},
{
"name": "source_trace_5",
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{
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},
{
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}
]
},
{
"name": "source_trace_6",
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{
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{
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{
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{
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}
]
},
{
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{
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{
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}
]
},
{
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},
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}
]
},
{
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{
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},
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}
]
},
{
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{
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},
{
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"pointId": "pcb_port_34",
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}
]
},
{
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{
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},
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}
]
},
{
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}
]
},
{
"name": "source_trace_14",
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{
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},
{
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"pointId": "pcb_port_37",
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}
]
},
{
"name": "source_trace_15",
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},
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}
]
},
{
"name": "source_trace_16",
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{
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},
{
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"layer": "top",
"pointId": "pcb_port_39",
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}
]
},
{
"name": "source_trace_17",
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{
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},
{
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"pointId": "pcb_port_40",
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}
]
},
{
"name": "source_trace_18",
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{
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},
{
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}
]
}
],
"layerCount": 2,
"minTraceWidth": 0.1,
"minViaDiameter": 0.3,
"minViaHoleDiameter": 0.2,
"minViaPadDiameter": 0.3,
"min_via_hole_diameter": 0.2,
"min_via_pad_diameter": 0.3
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