0hmX/am3352
This code suite comprises TypeScript scripts that analyze, verify, and assemble complex DDR memory interface hardware, focusing on physical routing, via and pad placement, electrical clearance, and physical constraints, often involving precise geometric calculations and consistent provenance tracking.
- Version
- 1.0.5
- License
- unset
- Stars
- 0
src/additional-decoupling.json
[
{
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"y": 2.6,
"rotation": 0,
"power": [
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3.2
],
"ground": [
-4,
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],
"supply": "VDDS_DDR",
"net": "VCC_DDR_1V5",
"capacitance": "100nF",
"name": "C20",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E5"
},
{
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],
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],
"supply": "VDDS_DDR",
"net": "VCC_DDR_1V5",
"capacitance": "100nF",
"name": "C21",
"footprint": "cap0201_nosilkscreen",
"targetBall": "F5"
},
{
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"power": [
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0
],
"ground": [
-4,
0
],
"supply": "VDDS_DDR",
"net": "VCC_DDR_1V5",
"capacitance": "100nF",
"name": "C22",
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"targetBall": "G5"
},
{
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],
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],
"supply": "VDDS_SRAM_CORE_BG",
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"footprint": "cap0402_nosilkscreen",
"targetBall": "E9"
},
{
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"supply": "VDDS_SRAM_MPU_BB",
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"targetBall": "D10"
},
{
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],
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},
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},
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],
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],
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"name": "C39",
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"targetBall": "F5"
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"footprint": "cap0201_nosilkscreen",
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"targetBall": "H5"
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"name": "C45",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E5"
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],
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"targetBall": "F5"
},
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"name": "C47",
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"targetBall": "G5"
},
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],
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],
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"net": "VCC_DDR_1V5",
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"name": "C48",
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"targetBall": "H5"
},
{
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],
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],
"supply": "VDDS_DDR",
"net": "VCC_DDR_1V5",
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"name": "C49",
"footprint": "cap0201_nosilkscreen",
"targetBall": "J5"
},
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],
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-8
],
"supply": "VDDS_DDR",
"net": "VCC_DDR_1V5",
"capacitance": "100nF",
"name": "C50",
"footprint": "cap0201_nosilkscreen",
"targetBall": "K5"
},
{
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0.8
],
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1.6,
0.8
],
"supply": "VDDA_ADC",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C51",
"footprint": "cap0201_nosilkscreen",
"targetBall": "D8"
},
{
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"power": [
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-4.8
],
"ground": [
4,
-4
],
"supply": "VDDA1P8V_USB0",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C52",
"footprint": "cap0201_nosilkscreen",
"targetBall": "N16"
},
{
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"power": [
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],
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5.6,
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],
"supply": "VDDA1P8V_USB1",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C53",
"footprint": "cap0201_nosilkscreen",
"targetBall": "R16"
},
{
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"power": [
1.6,
-7.2
],
"ground": [
0,
-7.2
],
"supply": "VDDS_OSC",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C54",
"footprint": "cap0201_nosilkscreen",
"targetBall": "R11"
},
{
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"power": [
1.6,
7.2
],
"ground": [
3.2,
7.2
],
"supply": "VDDS_PLL_DDR",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C55",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E7"
},
{
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"power": [
1.6,
-7.2
],
"ground": [
3.2,
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],
"supply": "VDDS_PLL_CORE_LCD",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C56",
"footprint": "cap0201_nosilkscreen",
"targetBall": "R10"
},
{
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"power": [
7.2,
1.6
],
"ground": [
7.2,
0
],
"supply": "VDDS_PLL_MPU",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C57",
"footprint": "cap0201_nosilkscreen",
"targetBall": "H15"
},
{
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"power": [
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7.2
],
"ground": [
3.2,
8
],
"supply": "VDDS_RTC",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C58",
"footprint": "cap0201_nosilkscreen",
"targetBall": "D7"
},
{
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"power": [
7.2,
-1.6
],
"ground": [
7.2,
0
],
"supply": "VDDA3P3V_USB0",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C59",
"footprint": "cap0201_nosilkscreen",
"targetBall": "N15"
},
{
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],
"ground": [
3.2,
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],
"supply": "VDDA3P3V_USB1",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C60",
"footprint": "cap0201_nosilkscreen",
"targetBall": "R15"
},
{
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4.8,
7.2
],
"ground": [
3.2,
7.2
],
"supply": "VDDS",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C61",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E6"
},
{
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"power": [
4.8,
7.2
],
"ground": [
3.2,
8
],
"supply": "VDDS",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C62",
"footprint": "cap0201_nosilkscreen",
"targetBall": "F9"
},
{
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"power": [
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-8
],
"ground": [
0,
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],
"supply": "VDDS",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C63",
"footprint": "cap0201_nosilkscreen",
"targetBall": "N6"
},
{
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-8
],
"ground": [
3.2,
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],
"supply": "VDDS",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C64",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P14"
},
{
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7.2
],
"ground": [
6.4,
7.2
],
"supply": "VDDS_SRAM_CORE_BG",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C65",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E9"
},
{
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8
],
"ground": [
6.4,
7.2
],
"supply": "VDDS_SRAM_MPU_BB",
"net": "VCC_1V8",
"capacitance": "10nF",
"name": "C66",
"footprint": "cap0201_nosilkscreen",
"targetBall": "D10"
},
{
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"rotation": 0,
"power": [
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-8
],
"ground": [
-4,
-8
],
"supply": "VDDSHV1",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C67",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P7"
},
{
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"rotation": 180,
"power": [
4.8,
-7.2
],
"ground": [
5.6,
-7.2
],
"supply": "VDDSHV1",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C68",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P8"
},
{
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"rotation": 0,
"power": [
7.2,
-7.2
],
"ground": [
5.6,
-7.2
],
"supply": "VDDSHV2",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C69",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P10"
},
{
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"rotation": 180,
"power": [
7.2,
-1.6
],
"ground": [
8,
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],
"supply": "VDDSHV2",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C70",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P11"
},
{
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"rotation": 0,
"power": [
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],
"ground": [
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],
"supply": "VDDSHV3",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C71",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P12"
},
{
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"y": -0.8,
"rotation": 90,
"power": [
8,
0
],
"ground": [
8,
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],
"supply": "VDDSHV3",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C72",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P13"
},
{
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"rotation": 270,
"power": [
8,
0
],
"ground": [
8,
1.6
],
"supply": "VDDSHV4",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C73",
"footprint": "cap0201_nosilkscreen",
"targetBall": "H14"
},
{
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"rotation": 90,
"power": [
8,
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],
"ground": [
8,
1.6
],
"supply": "VDDSHV4",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C74",
"footprint": "cap0201_nosilkscreen",
"targetBall": "J14"
},
{
"x": 7,
"y": 3.2,
"rotation": 90,
"power": [
8,
3.2
],
"ground": [
7.2,
2.4
],
"supply": "VDDSHV5",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C75",
"footprint": "cap0201_nosilkscreen",
"targetBall": "K14"
},
{
"x": 7.800000000000001,
"y": 4,
"rotation": 270,
"power": [
8,
3.2
],
"ground": [
8,
4.8
],
"supply": "VDDSHV5",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C76",
"footprint": "cap0201_nosilkscreen",
"targetBall": "L14"
},
{
"x": 7,
"y": 4.800000000000001,
"rotation": 90,
"power": [
7.2,
5.6
],
"ground": [
8,
4.8
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C77",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E10"
},
{
"x": 6.6000000000000005,
"y": 6.2,
"rotation": 0,
"power": [
7.2,
5.6
],
"ground": [
6.4,
7.2
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C78",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E12"
},
{
"x": 7.800000000000001,
"y": 5.6000000000000005,
"rotation": 90,
"power": [
7.2,
5.6
],
"ground": [
8,
4.8
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C79",
"footprint": "cap0201_nosilkscreen",
"targetBall": "E13"
},
{
"x": 7.2,
"y": 7,
"rotation": 0,
"power": [
8,
7.2
],
"ground": [
6.4,
7.2
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C80",
"footprint": "cap0201_nosilkscreen",
"targetBall": "G14"
},
{
"x": -7.2,
"y": -7.800000000000001,
"rotation": 0,
"power": [
-6.4,
-8
],
"ground": [
-8,
-8
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C81",
"footprint": "cap0201_nosilkscreen",
"targetBall": "N5"
},
{
"x": 1.6,
"y": -7.800000000000001,
"rotation": 180,
"power": [
0.8,
-8
],
"ground": [
2.4,
-8
],
"supply": "VDDSHV6",
"net": "VCC_IO_3V3",
"capacitance": "10nF",
"name": "C82",
"footprint": "cap0201_nosilkscreen",
"targetBall": "P6"
}
]
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