0hmX/am3352

This code suite comprises TypeScript scripts that analyze, verify, and assemble complex DDR memory interface hardware, focusing on physical routing, via and pad placement, electrical clearance, and physical constraints, often involving precise geometric calculations and consistent provenance tracking.

Version
1.0.5
License
unset
Stars
0

tests/checks-endpoint-layer.test.ts

import {test,expect} from 'bun:test'
import {checkEachPcbPortConnectedToPcbTraces} from '@tscircuit/checks'
function fixture(layer:string, offset=0, portLayers=['top']) {
 const route:any[]=[{route_type:'wire',x:2,y:0,layer,width:.12},{route_type:'wire',x:offset,y:0,layer,width:.12}]
 const circuit:any[]=[
  {type:'pcb_port',pcb_port_id:'port_top',source_port_id:'source_port_top',pcb_component_id:'component',x:0,y:0,layers:portLayers},
  {type:'pcb_smtpad',pcb_smtpad_id:'pad_top',pcb_port_id:'port_top',pcb_component_id:'component',x:0,y:0,shape:'circle',radius:.2,layer:'top'},
  {type:'pcb_trace',pcb_trace_id:'trace_internal',source_trace_id:'source_trace_internal',route},
 ]
 checkEachPcbPortConnectedToPcbTraces(circuit)
 return route.at(-1)
}
test('internal endpoint cannot acquire coincident top-only port',()=>expect(fixture('inner6').end_pcb_port_id).toBeUndefined())
test('internal endpoint cannot acquire overlapping top pad via fallback',()=>expect(fixture('inner6',.1).end_pcb_port_id).toBeUndefined())
test('same-layer pad contact still acquires port',()=>expect(fixture('top',.1).end_pcb_port_id).toBe('port_top'))
test('multilayer port retains valid internal contact',()=>expect(fixture('inner6',0,['top','inner6','bottom']).end_pcb_port_id).toBe('port_top'))